TensorWave
Waitlist- Custom
- on request
AMD's CDNA 5 flagship for frontier-scale training and inference in Helios rack systems.
By provider shows one card per company, placed where its best offer ranked. By configuration lists every offer.
What you can rent comes first: in stock, then waitlist, then not reported, then out of stock. Priced offers rank ahead of quote-only, and on-demand ahead of other billing types.
Within a group, five factors set the order:
We match the provider, its country, GPU model, form factor, billing type, availability and instance name. Matching is partial and case-insensitive. Everyday words work too, so "interruptible" finds spot and "sold out" finds out of stock.
No providers match .
Heads up: A provider's own page may quote a different figure, for example on tax, region or a promotion. A monthly-only plan shows a derived hourly rate. Verify before provisioning. More on how we price.
One MI455X has 432 GB of VRAM. In practice, that's enough memory for roughly 696B parameters at 4-bit or 189B at 16-bit, assuming a 32K context. Below are some open-weight LLMs, with the estimated memory and GPUs each one needs.
| Model | Memory (INT4 / FP4) | MI455Xs needed | Cost /hr | Cost /mo |
|---|---|---|---|---|
|
|
18 GB
|
1
|
–
|
–
|
|
|
22 GB
|
1
|
–
|
–
|
|
|
67 GB
|
1
|
–
|
–
|
|
|
178 GB
|
1
|
–
|
–
|
|
|
239 GB
|
1
|
–
|
–
|
|
|
306 GB
|
1
|
–
|
–
|
|
|
1,544 GB
|
4
|
–
|
–
|
Estimates based on the median on-demand rate. Memory is weights plus FP8 KV cache at 32K context per request (FP16/BF16 in the 16-bit column). GPU counts assume 90% of advertised VRAM is usable. No guarantee of runtime support, usable performance, or that a matching quantized build exists. Pricing methodology.
AMD MI455X · Per GPU
| Compute · dense | |
|---|---|
| FP4 | 40,265 TFLOPS |
| FP8 | 20,133 TFLOPS |
| FP16 / BF16 | 5,033 TFLOPS 10,066 with sparsity |
| INT8 | 5,033 TOPS 10,066 with sparsity |
| FP32 | 315 TFLOPS |
| Precision support | FP4FP6FP8FP16BF16FP32INT8 |
| Memory | |
|---|---|
| Capacity | 432 GB HBM4 |
| Bandwidth | 23,300 GB/s |
| ECC | Yes |
| Silicon | |
|---|---|
| Architecture | CDNA 5 |
| Process | TSMC 2nm / 3nm |
| Transistors | 320 billion |
| Compute units | 256 |
| Fabric and host | |
|---|---|
| GPU interconnect | Infinity Fabric 3,600 GB/s |
| Power | |
|---|---|
| Cooling | Liquid |
Source: official AMD MI455X datasheet.
As of September 25, 2026, we track 5 configs from 5 providers, all of them custom contracts, priced per deal and usually not published.
GetDeploying currently tracks MI455X configs from 5 providers. See the full price comparison above for every provider and config.
One MI455X runs models up to roughly 696B parameters at 4-bit quantization or 189B at 16-bit, assuming a 32K context. Larger models run across multiple GPUs: the model table above shows the estimated memory and GPU count for popular open-weight LLMs.
432 GB of HBM4 per GPU, the largest memory capacity announced for a data center accelerator, with 23.3 TB/s of bandwidth. Designed for the 72-GPU Helios rack architecture with UALink scale-up networking, targeting frontier model training and large-scale inference.
Shipments are ramping from late 2026 into the first half of 2027, so cloud availability is minimal and pricing is not yet published. For AMD workloads today, the MI355X is in production clouds now. ROCm, while rapidly improving, is narrower than CUDA, so evaluate software compatibility before committing.
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